STV0190 dual 40 msps 6-bit analog to digital converter may 1996 advance data 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 d5b d4b d3b d2b d1b d0b d5a d4a d3a d2a d1a d0a clkout v cco v cco ognd agnd v to p v ina v mida v midb v inb v bot ognd clkin v ccd dgnd v cca 0190-01.eps pin connections so28 (plastic micropackage) order code : STV0190 . resolution 6-bit . max. sampling frequency : 40 msps . ttl data outputs . built-in sampling and hold circuit . dual adc on chip to improve chan- nel matching applications . qpsk demodulation in a satellite decoder this is advance information on a new product no w in development or undergoing evaluation. details are subject to change without notice. description the STV0190 is a dual 40 msps 6-bit analog to digital converter. it is dedicated to qpsk demodulation in satellite receiver. the flash architecture combined with interpolation technic gives the best trade off between power consumption and maximum conversion speed. 1/7 ( datasheet : )
pin configuration pin n symbol function 1v cco output buffer supply voltage channel a + b 2 ognd output buffer ground channel a + b 3 agnd analog ground 4v top top reference voltage 5v ina analog input channel a 6v mida reference voltage dc coupling channel a 7v midb reference voltage dc coupling channel b 8v inb analog input channel b 9v bot bottom reference voltage 10 v cca analog supply voltage 11 dgnd digital ground 12 v ccd digital supply voltage 13 clkin clock input 14 ognd output buffer ground channel a + b 15 v cco output buffer supply voltage channel a + b 16 clkout clock output 17 to 22 d0a to d5a d0 (lsb) to d5 (msb) outputs channel a 23 to 28 d0b to d5b d0 (lsb) to d5 (msb) outputs channel b 0190-01.tbl STV0190 2/7
1 2 3 5 10 16 17 18 19 20 26 27 28 11 12 13 14 15 21 22 23 24 25 adc a 6 adc b 8 7 9 ttl outp ut latches ttl outp ut latches clock driver d5a d4a d3a d2a d1a d0a d5b d4b d3b d2b d1b d0b clkout clkin agnd dgnd ognd v cco v ccd v cca v ina v mida v inb v midb v bot 4 v top STV0190 0190-02.eps block diagram STV0190 3/7
absolute maximum ratings symbol parameter value unit analog supply voltage 3.1, 3.45 v digital supply voltage 3.1, 3.45 v t oper operating temperature 0, +70 o c 0190-02.tbl electrical characteristics (v cc = 3.3v, t amb = 0 to 70 o c, full scale 10mhz, 1.5v pp input, 40msps, c l = 20pf, unless otherwise specified) symbol parameter test conditions min. typ. max. unit analog input differential reference voltage v top -v bot 1 1.5 v pp variation of channel a to channel b (fs) 0.5 lsb 8 mv r in input resistance 20 k w input bandwidth 3db 20 mhz digital outputs high logic voltage 2.4 v cc v low logic voltage 0 0.4 v high logic current -4 ma low logic current 4ma logic format t pd output timing see figure 1 9 ns t v output timing see figure 1 5 ns t skew data output skew tsk (all outputs, settled within 20%) see figure 1 1 ns t aper aperture delay relative to data clock see figure 1 1 ns t r ,t f data output rise and fall time 4 ns clock input v ih high input voltage 2.0 v cc v v il low input voltage 0 0.8 v i ih high input current tbd m a i il low input current tbd m a clock duty cycle 40 60 % t cl clock period see figure 1 24 ns 0190-03.tbl analog input digital output most positive input 63 111111 62 111110 .... ............ 33 100001 32 100000 31 011111 30 011110 .... ............ 1 000001 least positive input 0 000000 STV0190 4/7
clock out s ignal digital s ignal analo g s ignal t aper t pd t v t cl n n+1 n+2 da ta for n da ta for n+1 da ta for n+2 t s kew 0190-03.eps note : this diagram shows a delay of one clock cycle. additionnal integer multiple delay periods are acceptable. output data must be valid on the rising edge of the clock out signal. figure 1 : timing diagram electrical characteristics (continued) symbol parameter test conditions min. typ. max. unit clock output v oh high ouput voltage 2.4 v cc v v ol low output voltage 0 0.4 v i oh high output current -4 ma i ol low output current 4 ma clock duty cycle 40 60 % t cl clock period 24 ns reference ladder top voltage v cc - 0.5 v bottom voltage v cc + 0.5 v dc bias restoration error open input digital output should be 32/64 011111 33/64 100000 zv top /v bot input impedance 90 w crosstalk isolation a/b 37 db dc accuracy integral non lin. -0.5 +0.5 lsb diff. non lin. -0.5 +0.5 lsb ac accuracy (f in = 10mhz, fs = 40 msps, v in = 95% fscale) effective number of bit 5 bits snr 33 db thd thd first 5 harmony 33 db integral non lin. -1 +1 lsb a/d amplifier response mismatching 0.2 db 0190-04.tbl STV0190 5/7
1 2 3 5 10 16 17 18 19 20 11 12 13 14 15 21 22 adc a 6 8 7 9 clock driver d5a d4a d3a d2a d1a d0a clkout clkin agnd dg nd o gnd v cco v ccd v cca v ina v mida v inb v bot 4 v top ttl outp ut latches adc b ttl outp ut latches 26 27 28 23 24 25 d5b d4b d3b d2b d1b d0b 10 m f 100nf 10 m f 100nf 10 m f 100nf 0v 0.1 m f 0v 0.1 m f 100 w 0.1 m f v midb 0v 0.1 m f 0v 100 w STV0190 0190-04.eps typical application STV0190 6/7
pm-so28.eps package mechanical data 28 pins - plastic micropackage (so) dimensions millimeters inches min. typ. max. min. typ. max. a 2.65 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 c 0.5 0.020 c1 45 o (typ.) d 17.7 18.1 0.697 0.713 e 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 f 7.4 7.6 0.291 0.299 l 0.4 1.27 0.016 0.050 s8 o (max.) so28tbl information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no licence is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without noti ce. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of sgs-thomson microelectronics. ? 1996 sgs-thomson microelectronics - all rights reserved purchase of i 2 c components of sgs-thomson microelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system confo rms to the i 2 c standard specifications as defined by philips. sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. STV0190 7/7
|
